2. Accelerators using the PCIe interconnect. A common and well-defined interface between CPUs and accelerators is to communicate over PCIe lanes. This architecture allows for various configurations in ...

Looking at the diagram, we see the CPU serving up 24 PCIe 4.0 lanes, with 16 of them jettisoned to two PCIe x16 slots for graphics cards. Those slots can be configured as either PCIe 4.0 x16 or x8/x8.

It's clear already that Ryzen 3000 CPUs (Matisse) and the X570 chipset will support PCIe 4.0. The new diagram once again confirms that the processor will provide a total of 24 PCIe 4.0 lanes.

Enabling PCIe 7.0 Technology – PCIe architecture provides a robust high-bandwidth interconnect solution for attaching compute chips and network devices used in AI / ML applications.

AMD Ryzen 4000H Renoir Block Diagram Confirms GPU PCIe 3 Limitation For Gaming Laptops by Paul Lilly — Thursday, July 23, 2020, 11:03 AM EDT Comments ...