Sep 16, 2020 · The design is simpler but has relatively lower speed than synchronous FIFO interface. To use the asynchronous FIFO transfer mode available on FT2232H, its hardware and driver must be configured as 245 FIFO and D2XX respectively. In this article, Channel A of FT2232H is configured as FIFO, which provides the following signals:

May 2, 2010 · It uses FT2232D on recent revisions. It may be the case, that the driver can work with High Speed FT2232H as well, but it surely won't support higher JTAG clock speeds than 6 MHz without being rewritten, so there's probably no benefit, just an increased current . consumption. --- Quote End ---

Jan 21, 2014 · Hello Im very new to FPGA's and am still learning so please be kind if the problem is obvious :) i have a FT2232H set to 245 Synchronous FIFO Mode. i have a program on the pc using the d2xx drivers sending exactly 512 bytes. the problem is when the fpga receives these 512 bytes and p...

Sep 11, 2024 · I'm using Morph-IC II and i'm having problems establishing the usb-communication between my Cyclone 2 and the FTDI FT2232H. My objective is to send a start/reset signal from PC->FPGA, then access the data from the FPGA till an end/reset signal. My problem is now the combination of sending/receiving.

Aug 2, 2012 · Hi . I have a hard time finding supporting documentation on the FTDI site regarding using a FTDI FT2232H device, one port is used for Data transfer ( 40 M) and the other is only used to program the FPGA (Active Serial) (and monitoring nConfig, nStatus, Config_Done).

Aug 4, 2016 · I have a Moprh-IC-II board and I'm trying to communicate via USB with a FT2232H in Sync FIFO Mode and D2XX Drivers. I manage to have the 60MHz clock input (my main fpga clock) from the ft2232h, and i can transfer data from the PC to my fpga via ft2232h with FT_Write(). FIFO Mode seems to work as expected on this side.

Jan 13, 2016 · I use it in this way: FPGA+FT2232H on custom board and PC Application on the other side. All stuff using in Synchronous FIFO mode. So from now I’m trying to send a byte command from FPGA and catch it in the windows application. And here is the problem. I didn’t saw errors or warnings it just not working.

Jan 15, 2010 · Yes, PS is usually the best method to load the FPGA configuration by a processor. FT2232H in MPSSE mode should be able to perform at it's maximum speed of 30 MHz when operated at at a high speed USB port.

Sep 24, 2020 · The design is simpler but has relatively lower speed than synchronous FIFO interface. To use the asynchronous FIFO transfer mode available on FT2232H, its hardware and driver must be configured as 245 FIFO and D2XX respectively. In this article, Channel A of FT2232H is configured as FIFO, which provides the following signals:

May 13, 2010 · I've just closed my service request with altera their politely stated response was use a MAX II to implement a usb blaster or leave us the hell alone